40Gb/s QSFP+ Active Optical Cable

40GBASE-SR4, up to 100m MM Fiber Link

Features

• Compliant to InfiniBand, 10Gbps QDR, 5Gbps DDR, 2.5 Gbps SDR
• Aggregate bandwidth of > 40Gbps
• MTP/MPO optical connector
• QSFP+ MSA compliant
• Capable of over 100m transmission on high bandwidth 50um multi-mode ribbon fiber
• Single +3.3V power supply
• Operating case temperature:0¡ãC to 70¡ãC(Standard), -40¡ãC to 85¡ãC (Industrial)
• RoHS compliant

Applications

• Rack to rack
• Data centers
• Metro networks
• Switches and Routers
• Infiniband 4x SDR, DDR, QDR
• 10G Ethernet

1. General Description
The QSFP-AOC40G-X is a parallel 40Gbps Quad Small Form-factor Pluggable (QSFP+) active optical cable that provides increased port density and total system cost savings. The QSFP+ full-duplex optical module offers 4 independent transmit and receive channels, each capable of 10Gbps operation for an aggregate bandwidth of 40Gbps over 100 meters of multi-mode fiber.
An optical fiber ribbon cable with an MPO/MTPTM connector at each end plugs into the QSFP+ module receptacle. The orientation of the ribbon cable is ¡°keyed¡± and guide pins are present inside the module¡¯s receptacle to ensure proper alignment. The cable usually has no twist (key up to key up) to ensure proper channel to channel alignment. Electrical connection is achieved though a z-pluggable 38-pin IPASS? connector.
The module operates from a single +3.3V power supply and LVCMOS/LVTTL global control signals such as Module Present, Reset, Interrupt and Low Power Mode are available with the modules. A 2-wire serial interface is available to send and receive more complex control signals and to obtain digital diagnostic information. Individual channels can be addressed and unused channels can be shut down for maximum design flexibility.
The QSFP-AOC40G-X is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP+ Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference. The module offers very high functionality and feature integration, accessible via a two-wire serial interface.

2. Functional Description
The TF-QQxxx-N00 converts parallel electrical input signals via a laser driver and a Vertical Cavity Surface Emitting Laser (VCSEL) array into parallel optical output signals. The transmitter module accepts electrical input signals which are voltage compatible with Common Mode Logic (CML) levels. All input data signals are differential and are internally terminated. The receiver module converts parallel optical input signals via a receiver and a photo detector array into parallel electrical output signals. The receiver module outputs electrical signals, which are voltage compatible with Common Mode Logic (CML) levels. All data signals are differential and support a data rates up to 10 Gbps per channel. Figure 1 shows the functional block diagram of the QSFP-40GAOC-X

A single +3.3V power supply is required to power up the module. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.
Module Select (ModSelL) is an input pin. When held low by the host, the module responds to 2-wire serial communication commands. The ModSelL allows the use of multiple QSFP+ modules on a single 2-wire interface bus ¨C individual ModSelL lines for each QSFP+ module must be used.
Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP+ memory map.
The ResetL pin enables a complete module reset, returning module settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.
Low Power Mode (LPMode) pin is used to set the maximum power consumption for the module in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.
Module Present (ModPrsL) is a signal local to the host board which, in the absence of a module, is normally pulled up to the host Vcc. When a module is inserted into the connector, it completes the path to ground though a resistor on the host board and asserts the signal. ModPrsL then indicates a module is present by setting ModPrsL to a ¡°Low¡± state.
Interrupt (IntL) is an output pin. When ¡°Low¡±, it indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.

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